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UID:69e8ccb591cb5@leapup.bitshifters.cloud
DTSTAMP:20260422T152717Z
DTSTART:20220504T160000Z
DTEND:20220504T170000Z
SUMMARY:Reusable Analog IP – Make Your IP Intelligent with Intelligent IP
DESCRIPTION:Analog/mixed-signal IC design is a critical challenge for ASIC development with tight specs and tapeout schedules that are not easy to meet. Especially when targeting various applications or multiple PDKs\, initial efforts\, design time\, and risks increase. In this webinar\, we will give you an insight into approaches to ease IP reuse across both PDKs and specifications by means of analog automation.
LOCATION:Fraunhofer IIS/EAS\, Münchner Straße\, 01187 Dresden
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