BEGIN:VCALENDAR
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CALSCALE:GREGORIAN
METHOD:PUBLISH
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UID:69e75a2f5b3d5@leapup.bitshifters.cloud
DTSTAMP:20260421T130623Z
DTSTART:20230215T160000Z
DTEND:20230215T170000Z
SUMMARY:Reusable Analog IP – Make Your IP Intelligent with Intelligent IP
DESCRIPTION:Designing analog/mixed-signal ICs is a major challenge for ASIC development with tight specifications and tapeout schedules that are not easy to meet. Therefore\, we are continuously working on concepts and automated design tools that help designers with both design efficiency and risk management. In this webinar we will give you an insight into some of these solutions and how you can benefit from our solutions via licensing or as part of contract development of analog automation.\nMORE
LOCATION:Fraunhofer IIS/EAS\, Dresden
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